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JULY 4 WEEKEND
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TECHNICAL PROGRAM

As with our 2007 meeting, we will have a mixture of invited oral speakers and selected poster presentations. New to this year will be a timely Panel debate, discussing the attributes of Advanced Lithography vs. Advanced Packaging to achieve performance enhancements.

The list of speakers will be updated periodically. To date the following have confirmed to present:

Section Name Presenter Affiliation Title (topic)
Computational litho Andy Neureuther Univ. of California at Berkeley Opening Pandora’s box with fast-CAD
Vivek Singh Intel Computational Lithography: Moore Bang for your Buck
Yuri Granik Mentor Graphics How Lithography->Computer->Lithography enables Computer->Lithography->Computer
Bob Socha ASML Lithography-Layout-Circuit Design Co-optimization in the Extremely
Andrzej Strojwas PDF Solutions & Carnegie Mellon Univ. Lithography-Layout-Circuit Design Co-optimization in the Extremely
Vito Dai GLOBALFOUNDRIES A Novel Methodology to Improve Lithographic Printability of Designs by Applying 2D Pattern Analysis
Linyong (Leo) Pang Luminescent Full Chip Scale Source Mask Optimization (SMO) Implemented through Level Set Methods based Inverse Lithography Technology (ILT) Framework
 
e-beam/
maskless litho		 Yoshinori Kojima  Fujitsu Electron Beam Direct Writing technology for the metal interconnect at 65nm node and beyond
Bert Jan Kampherbeek Mapper Lithography Lithography cost, it’s not only about throughput
Mark McCord KLA-Tencor KLA project status 
Christof Klein IMS-Nanofabrication Projection Mask-Less Lithography (PML2)
Serdar Manakli  CEA-LETI Complexity of data preparation and Proximity effects corrections in ebeam maskless lithography
 
EUV Lithography Hans Meiling ASML EUVL - Yes We Can!
Nigel Farrar Cymer Status of production worthy LPP EUV sources
Marc Corthout Philips EUV Update on the Beta and HVM Sn DPP Sources
Stephen Renwick Nikon Progress in EUV optics for beta and production EUV tools
Chawon Koh Samsung / SEMATECH Performance status of EUV resist
Sterling Watson KLA-Tencor Challenges and Alternatives for EUV Reticle Inspection Sterling
 
Metrology Wolf  Staud Applied Materials Metrology Challenges for 22nm Mask and Wafer
  Rick Silver National Institute of Standards and Technology Advanced Optical Measurements for Dense Feature Overlay Metrology
Isao Kawata Hitachi OPC Model Calibration by Measurement Based Averaged Contour from SEM Image
Timothy Crimmins Intel Defect Metrology Challenges in the EUV Lithography Regime
Cornel Bozdog NOVA Do’s and Don’t’s of Scatterometry Revisited
Nigel Smith Nanometrics The total measurement approach to lithography measurement and characterization
 
Masks Sam Sivakumar Intel Lithography in the Near Future – Challenges and Opportunities
  Tsuneo Terasawa SELETE EUVL Mask Inspection and Metrology Capability
  Naoya Hayashi Dai Nippon Printing NGL masks status and prospective : For EUV and NIL
 
Nano-imprint David Kuo Seagate patterned media using imprint lithography
SV Sreenivasan Molecular Imprints Imprint systems
Wei-Lun Jen University of Texas at Austin Dual damascene processing using multilevel step and flash imprint lithography
Jay Guo University of Michigan Roll-to-roll nanoimprinting and its applications
 
Novel patterning and packaging or 3D integration Paul Franzon North Carolina State University 3DIC Design and Applications
Tetsuo Endoh Tohoku University Impact of vertical structured devices for future nano LSI
Sang Yun Lee Besang Corporation Integration of Novel 3D structured devices
Rusty Harris Texas A&M University Physical device issues and constraints for real world 22nm 3D devices
Krishna Saraswat Stanford University 3D Device Architectures of DARPA 3D project
Katsuyuki Sakuma Waseda University 3D Chip-stacking technology
 
Advanced optical lithography Soichi Owa Nikon Optical Lithography Extensions
Alexander Tritchkov Mentor Graphics Latest Results of Source Optimization for 22nm Lithography Processes
Takayuki Uchiyama NECEL Pushing the limit of optical lithography for advanced logic device
Iwao Higashikawa Toshiba Corporation Challenges for 32nm and beyond
Rajesh Menon MIT Sculpting nanostructures with light
 
Advanced materials for patterning Paul Nealey University of Wisconsin at Madison Fundamentals of Directed Self-Assembly
Christopher Ober Cornell University Molecular Glass Resists Developable in Unconventional Solvents
Tom Wallow GLOBALFOUNDRIES/Ushio Correlation of Experimental and Simulated Cure-Induced Photoresist Distortions in Double Patterning
Richard A. Lawson Georgia Institute of Technology Negative Tone Molecular Resists Based on Cationic Polymerization: A Comparison of Resist Systems Designed for both Aqueous Alkaline and Solvent Based Development
Michael Thompson Cornell Sub-Millisecond Post Exposure Bake by CO2 Laser Spike Annealing of Chemically Amplified Resists
 
Posters or potential oral presentations David Noga Georgia Institute of Technology Pattern Collapse in High Resolution Lithography: Fundamental Characterization of the Problem and Possible Solutions
Tejas Jhaveri Carnegie Mellon University Cost per Good Die Analysis for the 22nm Technology Node
Akira Sumitani Komatsu Laser-produced plasma source for EUV lithography
Kenji Yamazoe UC Berkeley Fast Fine-pixel Aerial Image Calculation by Matrix Representation of Hopkins Equation
Marshal Miller UC Berkeley Novel Multi-Phenomena Pattern Matching for Assessing Impact of Mask Edge Effects
Chris H. Clifford UC Berkeley Investigation and characterization of buried EUV mask defect printability using actinic inspection and fast simulation
John Allgair SEMATECH TBD
Yuansheng Ma GlobalFoundries Line Edge Roughness Transfer from Mask to Wafer
Sudhar Raghunathan College of Nanoscale Science & Engineering, Albany Evaluation of image placement accuracy in EUV lithography